BRIAN W. BRAMLETT
   
   Portland, Oregon / San Francisco, California
   [1]bramlett@elemental.com
   
   OBJECTIVE  
     _________________________________________________________________
   
   Secure and develop a career with a progressive company in the areas of
   computer and digital information engineering with a goal of
   determining and implementing the next generation of technology.
   
   SKILLS  
     _________________________________________________________________
   
   Computer Engineering, Microelectronics, and VLSI
   
   Semiconductor device physics.
   Behavioral and Structural HDL Coding.
   Schematic design and logic verification.
   Bi/CMOS Circuit design and simulation.
   Extensive PLA optimization.
   Large bus design issues.
   Floorplanning and layout design.
   High-speed signal coupling issues.
   Reliability verification.
   Architecture and circuit-level power reduction.
   Design for testability.
   Parallel computer architectures and programming.
   Power and clock network design.
   
   Project management.
   Self-timed circuits.
   Extensive domino design.
   Cache array design.
   Performance verification.
   Fabrication of ultra-small devices.
   Novel electron device physics.
   Switching and automata theory.
   Microcode and assembly language design.
   Microelectronic fabrication techniques.
   Sophisticated computer architectures.
   Multidimensional DSP.
   Digital computer arithmetic.
   Digital processing of speech signals.
   
   Internet, Computer Graphics, User Interface, and Software Design
   
   Computer simulation of systems.
   3D Modelling and rendering.
   Data visualization.
   Computer communication networks.
   Web site design, development, and support.
   
   Human-computer interfaces.
   Microcomputer based control.
   Automatic measurements.
   German and Russian languages.
   Computer-based graphic design.
   C, C++, PERL, Shell, Java.
   
   EDUCATION  
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   Master of Science in Electrical Engineering June 1992
   Major in Computer Engineering (Microelectronics, Communications
   Networks, Digital Signal Processing)
   Minor in Information and Computer Science (Human-computer interfaces).
   Research in Electronic Beam Nanolithograhy and Quantum Device Physics
   Georgia Institute of Technology
   
   Bachelor of Electrical Engineering, High Honor June 1990
   Certificate Program completed in Computer Engineering
   Georgia Institute of Technology
   
   Bachelor of Science in Applied Physics, High Honor September 1989
   Georgia Institute of Technology
   
   EXPERIENCE  
     _________________________________________________________________
   
   Senior CAD Engineer May 1997 to Present
   Intel Corporation, Design Technology/Athena Group, Hillsboro, Oregon
   Verification and validation of full chip layout and physical design
   tools. Involved in re-engineering task force for internal physical
   design tools and for overall CAD tool and system architecture.
   
   Senior CAD Engineer May 1996 to May 1997
   Intel Corporation, Design Technology/Athena Group, Hillsboro, Oregon
   Verification and validation of full chip layout and physical design
   tools. Involved in re-engineering task force for internal physical
   design tools and for overall CAD tool and system architecture.
   
   Senior Software Engineer February 1996 to May 1996
   Intel Corporation, Software Tools and Integration Lab, Hillsboro,
   Oregon
   Software Engineer responsible for designing an architecture and
   process for bringing IAL technologies from the labs to Intel and the
   public, including testing, documentation, packaging, Internet delivery
   and demonstration, legal and marketing issues.
   
   Senior Software Engineer May 1995 to January 1996
   Intel Corporation, Internet Technologies Lab, Hillsboro, Oregon
   Software Engineer responsible for identifying and developing Web-based
   technologies. Technical liason to Corporate Marketing and the
   Corporate Presence Server Team.
   
   Senior Design Engineer July 1992 to May 1995
   Intel Corporation, Microprocessor Division 6, Hillsboro, Oregon
   VLSI Design Engineer responsible for RTL coding; schematic, circuit,
   timing, layout design, reviews, and oversight on the Pentium Pro
   Processor.
   
   Graduate Research Assistant July 1990 to February 1991
   Georgia Institute of Technology, Higgins Group
   Continuation of duties as Research Engineer on a part-time basis.
   
   Research Engineer I September 1989 to June 1990
   Microelectronics Research Center, Georgia Institute of Technology
   Design, installation, management, and maintenance of the Scanning
   Electron Microscope Electron Beam Nanolithography Facility.
   
   Intern Engineer June 1988 to September 1988
   Tektronix Solid State Research Laboratories, Beaverton, Oregon
   Operation and maintenance of Electron Beam Fabrication. Assisted in
   design and manufacture of experimental electro-optical devices and in
   process characterization.
   
   Undergraduate Research Assistant December 1987 to September 1989
   Georgia Institute of Technology, Higgins Group
   Design and construction of low temperature, high magnetic field sample
   probes.
   
   ASSOCIATIONS  
     _________________________________________________________________
   
   IEEE
   ACM
   HONORS  
     _________________________________________________________________
   
   Eta Kappa Nu Electrical Engineering Honor Society
   Tau Beta Pi Engineering Honor Society
   Georgia Tech [2]President's Scholar Academic Scholarship
   National Merit Scholar Academic Scholarship
   Georgia Governor's Scholar Academic Scholarship
     _________________________________________________________________
   
   Document URL: http://www.elemental.com/bramlett/resume.html
   ASCII Only: [3]http://www.elemental.com/bramlett/resume.txt
   Last modified: 01 Mar 99

References

   1. mailto:bramlett@elemental.com
   2. http://www.gatech.edu/psp/psp.html
   3. file://localhost/home/web/bramlett/resume.txt